The fabrication of various structures and structural is elements on substrates or other support surfaces is fundamental to the production of all modern microelectronic devices. As commonly practiced, surface fabrication techniques typically involve some form of lithography, in combination with deposition and growth, to etch and/or grow patterned structures that become the transistors and other electronic components on a semiconductor chip.
In the push for ever-increasing performance, density, and compactness of microelectronic devices a great deal of effort has been expended in improving the resolution of existing forms of lithography and developing new methods of fabrication that have the potential for achieving higher resolution.
Optical lithography has been improved to provide shorter and shorter wavelengths. X-ray, electron and ion beam lithographies have also been explored. While many improvements have been demonstrated, it is clear that optical lithography will soon hit fundamental limits, and there is as yet no obvious alternative cost-effective technology for fabricating electronic devices with dimensions less than 100 nm. The resolution of processes using lithographic exposure by photons is simply limited by the wavelengths of the exposing radiation. Charged-particle exposure is likewise limited by the wavelengths of the exposing radiation. Charged-particle beam lithography is also limited by inherent scattering of the charged particles and the resulting spread in the exposed pattern.
One promising approach to very high resolution surface fabrication has been the use of scanning tunneling microscopy to locally desorb atoms from a passivating layer (N. Kramer et al., J. Vac. Sci. Technol. B 13, 805 (1995)). This technique makes use of the energy deposited in the surface by low-voltage electrons as they tunnel from a tip. This energy can break the chemical bond of a passivating atom on the surface, causing it to desorb. The reactive surface is then exposed, and further processing can lead to bonding of a variety of other atoms, such as oxygen or a metal, or the removal of substrate material through etching.
While this technique has shown the capability of near atomic resolution, it suffers from the drawback of being an inherently serial process. That is, structures must be fabricated by scanning a tip from place to place on a surface. It would be highly desirable to provide a way to expand the capabilities of this approach to include the possibility of parallel fabrication. The concept of a large array of tips has been suggested, but this idea involves a number of problems. For example, a parallel array of tips cannot match the precise atomic-scale detail required to produce a pattern or any scale quality. Moreover, controlling the uniformity of many tips is extremely difficult. In addition, the required close proximity of the tip(s) to a surface can result in damage, destruction, and/or changes in the tip(s) during scanning. Scanning probe techniques are further restricted to use in conjunction with flat surface(s).
The present invention provides an alternate approach to past and current lithography techniques which circumvents disadvantages and drawbacks associated with such prior techniques.